Method for depositing a metal layer on a semiconductor interconnect structure having a capping layer

Disclosed is a method for depositing a metal layer on an interconnect structure for a semiconductor wafer. In the method, a metal conductor is covered by a capping layer and a dielectric layer. The dielectric layer is patterned so as to expose the capping layer. The capping layer is then sputter etc...

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Main Authors Clevenger, Larry, Dalton, Timothy, Hoinkis, Mark, Kaldor, Staffen, Kumar, Kaushik, La Tulipe, Douglas, Seo, Soon-Cheon, Simon, Andrew, Wang, Yun-Yu, Yang, Chih-Chao, Yang, Haining
Format Patent
LanguageEnglish
Published 17.06.2004
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Summary:Disclosed is a method for depositing a metal layer on an interconnect structure for a semiconductor wafer. In the method, a metal conductor is covered by a capping layer and a dielectric layer. The dielectric layer is patterned so as to expose the capping layer. The capping layer is then sputter etched to remove the capping layer and expose the metal conductor. In the process of sputter etching, the capping layer is redeposited onto the sidewall of the pattern. Lastly, at least one layer is deposited into the pattern and covers the redeposited capping layer.