Semiconductor device and process for forming same

• Main Authors: Takahama, Takashi, Horiuchi, Masatada
• Format: Patent
• Language: English
• Published: 07.08.2003

Disclosed is a method of manufacturing a semiconductor device capable of improving the reliability of the semiconductor device, which has a field effect transistor having a source-drain structure with a shallow junction. In the process for realizing the reduction of the resistance in a diffusion layer for a source and drain with a shallow junction, in which a part of an amorphous layer formed by the ion implantation for forming a diffusion layer for a source and drain is selectively melted and recrystallized by the use of laser irradiation, in order to prevent the occurrence of defects such as short circuit at a portion where a region to be melted and a gate electrode are overlapped with each other, ion implantation is performed after the formation of a first gate sidewall insulator on a sidewall of the gate electrode so as to obtain a structure in which the amorphous layer is not overlapped with the gate electrode. In this manner, it is possible to melt and recrystallize the amorphous layer without causing the defects such as short circuit.