Logic circuit and its forming method

This application proposes a new logic circuit including the 1st selector (S 1 ) in which the control input S is controlled by the first input signal (IN 1 ), the input I 1 or I 0 is controlled by the second input signal (IN 2 ), and the output O is connected to the first node (N 1 ), and the 3rd sel...

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Main Authors Yamashita, Shunzo, Yano, Kazuo, Sasaki, Yasuhiko
Format Patent
LanguageEnglish
Published 17.10.2002
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Abstract This application proposes a new logic circuit including the 1st selector (S 1 ) in which the control input S is controlled by the first input signal (IN 1 ), the input I 1 or I 0 is controlled by the second input signal (IN 2 ), and the output O is connected to the first node (N 1 ), and the 3rd selector (S 3 ) in which the control input S is controlled by the first node (N 1 ), the input I 1 is controlled by the third input signal (IN 3 ), the input I 0 is controlled by the first input signal (IN 1 ), and the output is connected to the first output signal (OUT 1 ).
AbstractList This application proposes a new logic circuit including the 1st selector (S 1 ) in which the control input S is controlled by the first input signal (IN 1 ), the input I 1 or I 0 is controlled by the second input signal (IN 2 ), and the output O is connected to the first node (N 1 ), and the 3rd selector (S 3 ) in which the control input S is controlled by the first node (N 1 ), the input I 1 is controlled by the third input signal (IN 3 ), the input I 0 is controlled by the first input signal (IN 1 ), and the output is connected to the first output signal (OUT 1 ).
Author Yamashita, Shunzo
Yano, Kazuo
Sasaki, Yasuhiko
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Snippet This application proposes a new logic circuit including the 1st selector (S 1 ) in which the control input S is controlled by the first input signal (IN 1 ),...
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