Optimizing Inverse-Mode @@iSiGe HBTs@ for Immunity to Heavy-Ion-Induced Single-Event Upset

Inverse-mode (collector-up) operation is proposed as a solution to the single-event-upset susceptibility observed in commercially available bulk silicon-germanium heterojunction bipolar transistors. Inverse-mode performance optimization [abstract truncated by publisher].

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Bibliographic Details
Published inIEEE electron device letters Vol. 30; no. 5; pp. 511 - 513
Main Authors Appaswamy, A, Phillips, S, Cressler, J D
Format Journal Article
LanguageEnglish
Published 01.05.2009
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Summary:Inverse-mode (collector-up) operation is proposed as a solution to the single-event-upset susceptibility observed in commercially available bulk silicon-germanium heterojunction bipolar transistors. Inverse-mode performance optimization [abstract truncated by publisher].
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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ObjectType-Feature-1
ISSN:0741-3106
DOI:10.1109/LED.2009.2016678