86Gbit/s SiGe receiver module with high sensitivity for 16086Gbit/s DWDM system
A 86Gbit/s SiGe receiver chip with an on-chip phase-locked loop and a preamplifier is presented. The chip is mounted and measured in a module assembly with RF-connectors. At the intended system data rate of 86Gbit/s bit-error-free operation at a high input sensitivity of 50mVpp is demonstrated. With...
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Published in | Electronics letters Vol. 42; no. 1; pp. 21 - 22 |
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Main Authors | , , , , , , |
Format | Journal Article |
Language | English |
Published |
05.01.2006
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Online Access | Get full text |
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Summary: | A 86Gbit/s SiGe receiver chip with an on-chip phase-locked loop and a preamplifier is presented. The chip is mounted and measured in a module assembly with RF-connectors. At the intended system data rate of 86Gbit/s bit-error-free operation at a high input sensitivity of 50mVpp is demonstrated. With an external clock, high-speed capability is proven by error-free operation up to 100Gbit/s. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 content type line 23 ObjectType-Feature-1 |
ISSN: | 0013-5194 |
DOI: | 10.1049/el:20063141 |