A 1.2-W single-chip MPEG2 MP%40ML video encoder LSI including widesearch range (H+/- 288, V:+/- 96) motion estimation and 81-MOPScontroller
An MPEG2 MP@ML video encoder large-scale integrated circuit (LSI) has been developed including an 81 MOPS controller and motion estimator. By using two adaptive algorithms, a wide motion-estimation search area (+/-288 pixels horizontal and +/-96 pixels vertical) was achieved with computation complex...
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Published in | IEEE journal of solid-state circuits Vol. 33; no. 11; pp. 1765 - 1771 |
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Main Authors | , , , , , , , |
Format | Journal Article |
Language | English |
Published |
01.11.1998
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Online Access | Get full text |
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Summary: | An MPEG2 MP@ML video encoder large-scale integrated circuit (LSI) has been developed including an 81 MOPS controller and motion estimator. By using two adaptive algorithms, a wide motion-estimation search area (+/-288 pixels horizontal and +/-96 pixels vertical) was achieved with computation complexity of only 0.5% (20 GOPS) of full search block-matching algorithm. By using this expanded motion-estimation search area, there is a significant improvement in picture quality for coding fast motion sequences. The power consumption was reduced by using an efficient pipeline architecture and optimizing the circuitry, especially in the motion-estimation block and the data transfers for the external SDRAM. The 13.7x12.4 mm(2), 4.5-M transistor device using 0.4-mum CMOS technology dissipates 1.2 W at 3.3 V |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 content type line 23 ObjectType-Feature-1 |
ISSN: | 0018-9200 |
DOI: | 10.1109/4.726574 |