A 99-mm super(2) 0.7-W single-chip MPEG-2 422PML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422PHL encoder system

• Published in: IEEE journal of solid-state circuits Vol. 37; no. 3; pp. 450 - 454
• Main Authors: Kumaki, Satoshi, Takata, Hidehiro, Ajioka, Yoshihide, Ooishi, Tsukasa, Ishihara, Kazuya, Hanami, Atsuo, Tsuji, Takaharu, Watanabe, Tetsuya, Morishima, Chikayoshi, Yoshizawa, Tomoaki, Sato, Hidenori, Hattori, Shin-Ichi, Koshio, Atsushi, Tsukamoto, Kazuhiro, Matsumura, Tetsuya
• Format: Journal Article
• Language: English
• Published: 01.03.2002
• ISSN: 0018-9200

A scalable single-chip 422PML MPEG-2 video, audio, and system encoder LSI for portable 422PHL system is described. The encoder LSI is implemented using 0.13- mu m embedded DRAM technology. It integrates 3-M logic gates and 64-Mb DRAM in an area of 99-mm super(2). The power consumption is suppressed to 0.7 W by adopting a low-power DRAM core. It performs real-time 422PML video encoding, audio encoding, and system encoding with no external DRAM. Furthermore, the encoder LSI realizes a 422PHL video encoder with multichip configuration, due to its scalable architecture. This results in a PC-card size 422PHL encoder for portable HDTV codec system.