Newly designed planar stacked capacitor cell with high dielectric constant film for 256Mbit DRAM
This film of (Ba sub(0.75)Sr sub(0.25))TiO sub(3) with equivalent SiO sub(2) thickness of 0.47nm has been developed for capacitor dielectric film of 256Mbit DRAM. A novel cell design named FOGOS (FOlded Global and Open Segment bit-line cell) structure is also proposed for 256Mbit DRAM. By combining...
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| Published in | IEEE International Electron Devices Meeting, 1993 |
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| Main Authors | , , , , , , , , , , , , , , , , |
| Format | Journal Article |
| Language | English |
| Published |
01.01.1993
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| Online Access | Get full text |
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| Abstract | This film of (Ba sub(0.75)Sr sub(0.25))TiO sub(3) with equivalent SiO sub(2) thickness of 0.47nm has been developed for capacitor dielectric film of 256Mbit DRAM. A novel cell design named FOGOS (FOlded Global and Open Segment bit-line cell) structure is also proposed for 256Mbit DRAM. By combining high dielectric constant film and FOGOS design, we have succeeded in making a practical and integrated cell that has sufficient cell capacitance with planar stacked capacitor, small bitline parasitic capacitance and large lithographic tolerance of alignment and DOF. 0.72 mu m super(2) cell size based on 0.25 mu m process technology is realized. |
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| AbstractList | This film of (Ba sub(0.75)Sr sub(0.25))TiO sub(3) with equivalent SiO sub(2) thickness of 0.47nm has been developed for capacitor dielectric film of 256Mbit DRAM. A novel cell design named FOGOS (FOlded Global and Open Segment bit-line cell) structure is also proposed for 256Mbit DRAM. By combining high dielectric constant film and FOGOS design, we have succeeded in making a practical and integrated cell that has sufficient cell capacitance with planar stacked capacitor, small bitline parasitic capacitance and large lithographic tolerance of alignment and DOF. 0.72 mu m super(2) cell size based on 0.25 mu m process technology is realized. |
| Author | Morizumi, K Sumitani, H Maruyama, T Yoshida, A Katayama, T Namoba, K Ohno, Y Shibano, T Sato, K Kishimura, S Itoh, H Eimori, T Kimura, H Asakura, M Horikawa, T Matsufusa, J Hayashide, Y |
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| Title | Newly designed planar stacked capacitor cell with high dielectric constant film for 256Mbit DRAM |
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