Newly designed planar stacked capacitor cell with high dielectric constant film for 256Mbit DRAM

• Published in: IEEE International Electron Devices Meeting, 1993
• Main Authors: Eimori, T, Ohno, Y, Kimura, H, Matsufusa, J, Kishimura, S, Yoshida, A, Sumitani, H, Maruyama, T, Hayashide, Y, Morizumi, K, Katayama, T, Asakura, M, Horikawa, T, Shibano, T, Itoh, H, Sato, K, Namoba, K
• Format: Journal Article
• Language: English
• Published: 01.01.1993
• ISBN: 9780780314504; 0780314506

This film of (Ba sub(0.75)Sr sub(0.25))TiO sub(3) with equivalent SiO sub(2) thickness of 0.47nm has been developed for capacitor dielectric film of 256Mbit DRAM. A novel cell design named FOGOS (FOlded Global and Open Segment bit-line cell) structure is also proposed for 256Mbit DRAM. By combining high dielectric constant film and FOGOS design, we have succeeded in making a practical and integrated cell that has sufficient cell capacitance with planar stacked capacitor, small bitline parasitic capacitance and large lithographic tolerance of alignment and DOF. 0.72 mu m super(2) cell size based on 0.25 mu m process technology is realized.