Superconducting integrated circuit fabrication with low temperature ECR-based PECVD SiO sub(2) dielectric films

A superconducting integrated circuit fabrication process has been developed to encompass a wide range of applications such as Josephson voltage standards, VLSI scale array oscillators, SQUIDs, and kinetic-inductance-based devices. An optimal Josephson junction process requires low temperature proces...

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Bibliographic Details
Published inIEEE transactions on applied superconductivity Vol. 5; no. 2; pp. 2303 - 2309
Main Authors Sauvageau, J E, Burroughs, C J, Booi, P A A, Cromar, M W, Benz, S P, Koch, J A
Format Journal Article
LanguageEnglish
Published 01.01.1995
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Summary:A superconducting integrated circuit fabrication process has been developed to encompass a wide range of applications such as Josephson voltage standards, VLSI scale array oscillators, SQUIDs, and kinetic-inductance-based devices. An optimal Josephson junction process requires low temperature processing for all deposition and etching steps. This low temperature process involve an electron cyclotron resonance-based plasma-enhanced chemical vapor deposition of SiO sub(2) films for interlayer dielectrics. Experimental design and statistical process control techniques have been used to ensure high quality oxide films. Oxide and niobium etches include endpoint detection and controlled overetch of all films. An overview of the fabrication process is presented.
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ISSN:1051-8223