Improving source/drain contact resistance of amorphous indium-gallium-zinc-oxide thin-film transistors using an n super(+)-ZnO buffer layer

• Published in: Japanese Journal of Applied Physics Vol. 55; no. 6; p. 06GG05
• Main Authors: Hung, Chien-Hsiung, Wang, Shui-Jinn, Lin, Chieh, Wu, Chien-Hung, Chen, Yen-Han, Liu, Pang-Yi, Tu, Yung-Chun, Lin, Tseng-Hsing
• Format: Journal Article
• Language: English
• Published: 01.06.2016
• Subjects: Buffer layers; Chambers; Channels; Drains; Electrodes; Electronics; Semiconductor devices; Thin film transistors
• ISSN: 0021-4922; 1347-4065
• DOI: 10.7567/JJAP.55.06GG05

To avoid high temperature annealing in improving the source/drain (S/D) resistance (R sub(DS)) of amorphous indium-gallium-zinc-oxide ([alpha]-IGZO) thin-film transistors (TFTs) for flexible electronics, a simple and efficient technique using a sputtering-deposited n super(+)-ZnO buffer layer (BL) sandwiched between the S/D electrode and the [alpha]-IGZO channel is proposed and demonstrated. It shows that the R sub(DS) of [alpha]-IGZO TFTs with the proposed n super(+)-ZnO BL is reduced to 8.1 x 10 super(3)[Omega] as compared with 6.1 x 10 super(4)[Omega] of the conventional one. The facilitation of carrier tunneling between the S/D electrode and the [alpha]-IGZO channel through the use of the n super(+)-ZnO BL to lower the effective barrier height therein is responsible for the R sub(DS) reduction. Effects of the chamber pressure on the carrier concentration of the sputtering-deposited n super(+)-ZnO BL and the thickness of the BL on the degree of improvement in the performance of [alpha]-IGZO TFTs are analyzed and discussed.