Submicrometer rm Nb / rm Al - rm AlO rm x / rm Nb Integrated Circuit Fabrication Process for Quantum | Computing Applications

We have developed a low J sub(c) (100-1000 A/cm super(2)) submicrometer Nb integrated circuit fabrication process for SQUID-based quantum computing applications. The baseline process consists of 7 masking steps including Pd-Au resistor, Nb/Al-AlO sub(x)/Nb trilayer, two Nb wiring layers and two sput...

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Bibliographic Details
Published inIEEE transactions on applied superconductivity Vol. 19; no. 3
Main Authors Bumble, B, Fung, A, Kaul, AB, Kleinsasser, A W, Kerber, G L, Bunyk, P, Ladizinsky, E
Format Journal Article
LanguageEnglish
Published 01.01.2009
Subjects
Aluminum
Current density
Ground plane
Integrated circuits
Masking
Niobium
Palladium
Wafers
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Summary:We have developed a low J sub(c) (100-1000 A/cm super(2)) submicrometer Nb integrated circuit fabrication process for SQUID-based quantum computing applications. The baseline process consists of 7 masking steps including Pd-Au resistor, Nb/Al-AlO sub(x)/Nb trilayer, two Nb wiring layers and two sputtered SiO sub(2) dielectric layers. We have also fabricated wafers with an Nb ground plane. Using deep-UV lithography, inductively coupled plasma etch tools, and self-aligned lift-off for device definition, we routinely achieve micrometer lines and spaces with 400 nm minimum junction dimensions. Room temperature testing is used to select wafers in process and junction annealing has been calibrated for trimming current density. We will describe the process which has been used to produce circuits with over 100 junctions.
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ISSN:1051-8223
DOI:10.1109/TASC.2009.2018249