"FIELD PROGRAMMABLE DSP ARRAYS" - A NOVEL RECONFIGURABLE ARCHITECTURE FOR EFFICIENT REALIZATION OF DIGITAL SIGNAL PROCESSING FUNCTIONS

Digital Signal Processing functions are widely used in real time high speed applications. Those functions are generally implemented either on ASICs with inflexibility, or on FPGAs with bottlenecks of relatively smaller utilization factor or lower speed compared to ASIC. The proposed reconfigurable D...

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Published inSignal and image processing : an international journal Vol. 4; no. 2; p. 41
Main Authors Sinha, Amitabha, Acharyya, Soumojit, Chakraborty, Suranjan, Sarkar, Mitrava
Format Journal Article
LanguageEnglish
Published 01.04.2013
Subjects
Architecture
Arrays
Digital signal processing
Field programmable gate arrays
High speed
Image processing
Microprocessors
Modules
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Summary:Digital Signal Processing functions are widely used in real time high speed applications. Those functions are generally implemented either on ASICs with inflexibility, or on FPGAs with bottlenecks of relatively smaller utilization factor or lower speed compared to ASIC. The proposed reconfigurable DSP processor is redolent to FPGA, but with basic fixed Common Modules (CMs) (like adders, subtractors, multipliers, scaling units, shifters) instead of CLBs. This paper introduces the development of a reconfigurable DSP processor that integrates different filter and transform functions. The switching between DSP functions is occurred by reconfiguring the interconnection between CMs. Validation of the proposed reconfigurable architecture has been achieved on Virtex5 FPGA. The architecture provides sufficient amount of flexibility, parallelism and scalability.
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ISSN:2229-3922
0976-710X