Plated-Through-Hole Via Design Specifications for 112G Serial Links
An earlier study of a high layer-count test board using plated-through-hole (PTH) vias and a limited quantity of laser vias was shown to be capable of supporting 112 Gb/s PAM-4 links (or equivalent signaling having 28 GHz (Nyquist) bandwidth). This original board design was then rebuilt using a diff...
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Published in | arXiv.org |
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Main Authors | , , , , |
Format | Paper |
Language | English |
Published |
Ithaca
Cornell University Library, arXiv.org
17.01.2023
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Subjects | |
Online Access | Get full text |
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Summary: | An earlier study of a high layer-count test board using plated-through-hole (PTH) vias and a limited quantity of laser vias was shown to be capable of supporting 112 Gb/s PAM-4 links (or equivalent signaling having 28 GHz (Nyquist) bandwidth). This original board design was then rebuilt using a different fabricator, and the test results revealed a significant decrease in the bandwidth of the vias. These results led to the development of a set of design specifications that PCB vendors can easily validate, which will ensure that the use of high layer-count boards with PTH technology are viable for emerging 112 Gb/s PAM-4 links. |
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ISSN: | 2331-8422 |