A WCET-aware cache coloring technique for reducing interference in real-time systems
The predictability of a system is the condition to give saferbound on worst case execution timeof real-time tasks which are running on it. Commercial off-the-shelf(COTS) processors are in-creasingly used in embedded systems and contain shared cache memory. This component hasa hard predictable behavi...
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Published in | arXiv.org |
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Main Authors | , , , |
Format | Paper |
Language | English |
Published |
Ithaca
Cornell University Library, arXiv.org
20.05.2019
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Subjects | |
Online Access | Get full text |
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