Strain-Based Room-Temperature Non-Volatile MoTe\(_2\) Ferroelectric Phase Change Transistor
The primary mechanism of operation of almost all transistors today relies on electric-field effect in a semiconducting channel to tune its conductivity from the conducting 'on'-state to a non-conducting 'off'-state. As transistors continue to scale down to increase computational...
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Published in | arXiv.org |
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Main Authors | , , , , , , , |
Format | Paper |
Language | English |
Published |
Ithaca
Cornell University Library, arXiv.org
17.05.2019
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Subjects | |
Online Access | Get full text |
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Summary: | The primary mechanism of operation of almost all transistors today relies on electric-field effect in a semiconducting channel to tune its conductivity from the conducting 'on'-state to a non-conducting 'off'-state. As transistors continue to scale down to increase computational performance, physical limitations from nanoscale field-effect operation begin to cause undesirable current leakage that is detrimental to the continued advancement of computing. Using a fundamentally different mechanism of operation, we show that through nanoscale strain engineering with thin films and ferroelectrics (FEs) the transition metal dichalcogenide (TMDC) MoTe\(_2\) can be reversibly switched with electric-field induced strain between the 1T'-MoTe\(_2\) (semimetallic) phase to a semiconducting MoTe\(_2\) phase in a field effect transistor geometry. This alternative mechanism for transistor switching sidesteps all the static and dynamic power consumption problems in conventional field-effect transistors (FETs). Using strain, we achieve large non-volatile changes in channel conductivity (G\(_{on}\)/G\(_{off}\)~10\(^7\) vs. G\(_{on}\)/G\(_{off}\)~0.04 in the control device) at room temperature. Ferroelectric devices offer the potential to reach sub-ns nonvolatile strain switching at the attojoule/bit level, having immediate applications in ultra-fast low-power non-volatile logic and memory while also transforming the landscape of computational architectures since conventional power, speed, and volatility considerations for microelectronics may no longer exist. |
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Bibliography: | content type line 50 SourceType-Working Papers-1 ObjectType-Working Paper/Pre-Print-1 |
ISSN: | 2331-8422 |
DOI: | 10.48550/arxiv.1905.07423 |