A 300-[Formula Omitted] Audio [Formula Omitted] Modulator With 100.5-dB DR Using Dynamic Bias Inverter

• Published in: IEEE transactions on circuits and systems. I, Regular papers Vol. 63; no. 11; p. 1866
• Main Authors: Lee, Sangwoo, Woojin Jo, Song, Seungwoo, Chae, Youngcheol
• Format: Journal Article
• Language: English
• Published: New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01.11.2016
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2016.2598734

This paper presents a micropower audio delta-sigma [Formula Omitted] modulator for mobile applications. This work employs power-efficient integrators based on the dynamic bias inverter, which consists of a cascode inverter, a floating current source and two offset-storage capacitors. The quiescent current of the inverter is copied from the floating current via offset-storage capacitors and the speed limitation caused by the cascode transistors in the inverter is resolved by using active parasitic compensation. This maximizes both [Formula Omitted]/[Formula Omitted] ratio and slew rate of the inverter-based integrator, while compensating process, voltage, and temperature (PVT) variations. To verify the effectiveness of the proposed technique, a single-bit third-order [Formula Omitted] modulator is implemented in a 0.18 [Formula Omitted] CMOS technology. The prototype modulator achieves 97.7 dB SNDR, 98.6 dB SNR, and 100.5 dB DR in a 20-kHz signal bandwidth, while consuming only 300-[Formula Omitted] from a 1.8 V supply. This corresponds to a state-of-the-art Schreier's FoM of 178.7 dB. The results are fully verified under variable supplies and temperatures.