A Novel BJT Structure Implemented Using CMOS Processes for High-Performance Analog Circuit Applications : The 2011 International Conference on Microelectronic Test Structures

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Bibliographic Details
Published inIEEE transactions on semiconductor manufacturing Vol. 25; no. 4; pp. 549 - 554
Main Authors JUNG, Yi-Jung, PARK, Byoung-Seok, KWON, Hyuk-Min, KWON, Sung-Kyu, JANG, Jae-Hyung, KWAK, Ho-Young, CHUNG, Yi-Sun, LEE, Jung-Hwan, LEE, Hi-Deok
Format Journal Article
LanguageEnglish
Published New York, NY Institute of Electrical and Electronics Engineers 2012
Subjects
Analog circuits
Applied sciences
Circuit properties
Design. Technologies. Operation analysis. Testing
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Integrated circuits
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Transistors
Analog circuit
Performance evaluation
High performance
MOSFET
CMOSFET
Transmitter
parasitic BJT
Implementation
Bipolar transistor
Junction transistors
Complementary MOS transistor
Complementary MOS technology
Analog performance
Collector
matching coefficient
Current density
Current gain
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ISSN:0894-6507
1558-2345