Investigation of a Sequential Three-Dimensional Process for Back-Illuminated CMOS Image : SOLID-STATE IMAGE SENSORS

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 56; no. 11; pp. 2403 - 2413
Main Authors COUDRAIN, Perceval, MAGNAN, Pierre, GIFFARD, Benoit, ANCEY, Pascal, BATUDE, Perrine, GAGNARD, Xavier, LEYRIS, Cédric, VINET, Maud, CASTEX, Arnaud, LAGAHE-BLANCHARD, Chrystelle, POUYDEBASQUE, Arnaud, CAZAUX, Yvon
Format Journal Article
LanguageEnglish
Published New York, NY Institute of Electrical and Electronics Engineers 2009
Subjects
Applied sciences
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Imaging devices
Integrated circuits
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Transistors
Stacking
Depletion layer
CMOS image sensors
Transistor
Review
1/f noise
Readout electronics
Silicon on insulator technology
fully depleted silicon-on-insulator (FDSOI) transistors
Three dimensional model
pixel miniaturization
Three dimensional structure
Complementary MOS technology
Integrated circuit
Tridimensional image
Miniaturization
CMOS image sensors (CISs)
Miniaturized design
sequential integration
3-D integration
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ISSN:0018-9383
1557-9646