Accurate Litho Model Tuning Using Design-Based Defect Binning : Advanced semiconductor manufacturing conference

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Bibliographic Details
Published inIEEE transactions on semiconductor manufacturing Vol. 21; no. 3; pp. 316 - 321
Main Authors VASEK, Jim, SVIDENKO, Vicky, NEHMADI, Youval, SHIMSHI, Rinat
Format Journal Article
LanguageEnglish
Published New York, NY Institute of Electrical and Electronics Engineers 2008
Subjects
Applied sciences
Electronics
Exact sciences and technology
Microelectronic fabrication (materials and surfaces technology)
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
RET
Optical proximity correction
Lithography
Defect inspection
Mask
Optimization
Data reduction
Microelectronic fabrication
Model matching
model tuning
Repeater
design based binning
Miniaturization
Photolithography
optical proximity correction (OPC)
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ISSN:0894-6507
1558-2345