A Single-Bit 2nd-Order CIFF Delta-Sigma Modulatorfor Precision Measurement of Battery Current

• Published in: 한국정보전자통신기술학회 논문지, 13(3) pp. 184 - 196
• Main Authors: 배기경, 천지민
• Format: Journal Article
• Language: English
• Published: 한국정보전자통신기술학회 01.06.2020
• Subjects: 전자/정보통신공학
• ISSN: 2005-081X; 2288-9302

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for precision measurement of current flowing through a secondary cell battery in a battery management system (BMS). The proposed modulator implements two switched capacitor integrators and a single-bit comparator with peripheral circuits such as a non-overlapping clock generator and a bias circuit. The proposed structure is designed to be applied to low-side current sensing method with low common mode input voltage. Using the low-side current measurement method has the advantage of reducing the burden on the circuit design. In addition, the ±30mV input voltage is resolved by the ADC with 15-bit resolution, eliminating the need for an additional programmable gain amplifier (PGA). The proposed a single-bit 2nd-order delta-sigma modulator has been implemented in a 350-nm CMOS process. It achieves 95.46-dB signal-to-noise-and-distortion ratio (SNDR), 96.01-dB spurious-free dynamic range (SFDR), and 15.56-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 400 for 5-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 670⨯490 μm2 and 414 μW, respectively. KCI Citation Count: 0