Design of a 25 mW 16 frame/s 10-bit Low Power CMOS Image Sensor for Mobile Appliances

• Published in: Journal of semiconductor technology and science pp. 103 - 109
• Main Authors: 김대연, 송민규
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.06.2011
• Subjects: 전기공학
• ISSN: 1598-1657; 2233-4866

A CMOS Image Sensor (CIS) mounted on mobile appliances requires low power consumption due to limitations of the battery life cycle. In order to reduce the power consumption of CIS, we propose novel power reduction techniques such as a data flipflop circuit with leakage current elimination and a low power single slope analog-to-digital (A/D)converter with a sleep-mode comparator. Based on 0.13 μm CMOS process, the chip satisfies QVGA resolution (320 × 240 pixels) that the cell pitch is 2.25um and the structure is a 4-Tr active pixel sensor. From the experimental results, the performance of the CIS has a 10-b resolution, the operating speed of the CIS is 16 frame/s, and the power dissipation is 25mW at a 3.3 V(analog)/1.8 V(digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption was reduced by approximately 22% in the sleep mode,and 20% in the active mode. KCI Citation Count: 1