Modeling of a 200 KHz Bandwidth Low-pass Switch-capacitor Sigma-delta DAC with a Raised Spur-free Modulator

• Published in: Journal of semiconductor technology and science Vol. 17; no. 5; pp. 666 - 674
• Main Authors: Chen, Yaya, Han, Yan, Zhang, Shifeng, Cao, Tianlin, Han, Xiaoxia, Cheung, Ray C.C
• Format: Journal Article
• Language: Korean
• Published: 2017
• Subjects: Switch capacitor; dither; behavior-level modeling; dynamic element match; {\Sigma}{\Delta}DAC
• ISSN: 1598-1657

This paper proposes a modulator that improves the signal-to-noise and distortion ratio (SNDR) by 6 dB compared with the conventional modulator. A high pass dither shaper added to the raised modulator eliminates harmonic spurs without increasing the in-band noise floor. Moreover, a behavior-level modeling method is proposed for a 200 KHz bandwidth switch-capacitor sigma-delta digital to analog converter (SC ${\Sigma}{\Delta}DAC$). Consequently, by considering the main non-idealities in the SC ${\Sigma}{\Delta}DAC$, in contrast with the conventional SC ${\Sigma}{\Delta}DAC$, MATLAB simulation results show that the SC ${\Sigma}{\Delta}DAC$ with the proposed modulator boosts the SNDR by approximately 6 dB and the spurious free dynamic range (SFDR) by approximately 8 dB. Finally, with the circuit implemented in a $0.18{\mu}m$ CMOS process, the measurement results are also used to further validate the proposed SC ${\Sigma}{\Delta}DAC$ model.