A Channel Model of Scaled RC-dominant Wires for High-Speed Wireline Transceiver Design

This paper explains modeling and analysis of RC-dominant wires for high-speed wireline transceiver design. A closed form formula derived from telegrapher's equation accurately describes a frequency response of an RC-dominant wire, yet it is simple and intuitive for designers to easily understan...

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 13; no. 5; pp. 482 - 491
Main Authors Choi, Minsoo, Sim, Jae-Yoon, Park, Hong-June, Kim, Byungsub
Format Journal Article
LanguageKorean
Published 2013
Subjects
wireline transceiver design
Channel model
signaling modes
RC-dominant wires
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Summary:This paper explains modeling and analysis of RC-dominant wires for high-speed wireline transceiver design. A closed form formula derived from telegrapher's equation accurately describes a frequency response of an RC-dominant wire, yet it is simple and intuitive for designers to easily understand design trade-offs without a complex numerical equation solver. This paper explains how the model is derived and how it can help designers in example transceiver designs.
Bibliography:KISTI1.1003/JNL.JAKO201333363223863
ISSN:1598-1657