A New Resistance Model for a Schottky Barrier Diode in CMOS Including N-well Thickness Effect

A new resistance model for a Schottky Barrier Diode (SBD) in CMOS technology is proposed in this paper. The proposed model includes the n-well thickness as a variable to explain the operational behavior of a planar SBD which is firstly introduced in this paper. The model is verified using the simula...

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 13; no. 4; pp. 381 - 386
Main Authors Lee, Jaelin, Kim, Suna, Hong, Jong-Phil, Lee, Sang-Gug
Format Journal Article
LanguageKorean
Published 2013
Subjects
CMOS
capacitance
n-well thickness
Schottky barrier diodes
cut-off frequency
resistance
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Summary:A new resistance model for a Schottky Barrier Diode (SBD) in CMOS technology is proposed in this paper. The proposed model includes the n-well thickness as a variable to explain the operational behavior of a planar SBD which is firstly introduced in this paper. The model is verified using the simulation methodology ATLAS. For verification of the analyzed model and the ATLAS simulation results, SBD prototypes are fabricated using a $0.13{\mu}m$ CMOS process. It is demonstrated that the model and simulation results are consistent with measurement results of fabricated SBD.
Bibliography:KISTI1.1003/JNL.JAKO201324947257602
ISSN:1598-1657