High yielding self-aligned contact process for a 0.150-/spl mu/m DRAM technology

This paper describes improvements in the self-aligned contact process for 0.150 /spl mu/m and 0.175 /spl mu/m technology generations. Using a dynamic random access memory cell layout, we show that self-aligned contacts can be formed at 0.175 /spl mu/m ground rules and beyond by using a C/sub 4/F/sub...

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Bibliographic Details
Published inIEEE transactions on semiconductor manufacturing Vol. 15; no. 2; pp. 223 - 228
Main Authors Rupp, T.S., Dobuzinsky, D., Sardesai, V.Y., Hang-Yip Liu, Maldei, M., Faltermeier, J., Gambino, J.
Format Journal Article
LanguageEnglish
Published IEEE 01.05.2002
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Summary:This paper describes improvements in the self-aligned contact process for 0.150 /spl mu/m and 0.175 /spl mu/m technology generations. Using a dynamic random access memory cell layout, we show that self-aligned contacts can be formed at 0.175 /spl mu/m ground rules and beyond by using a C/sub 4/F/sub 8/-CH/sub 2/F/sub 2/ chemistry. With the improved etch selectivity, gate cap nitride thickness can be reduced, resulting in a smaller aspect ratio for the gate etch, borophosphosilicate glass fill, and contact etch. With a rectangular contact, the area can be increased and the process windows for lithography and etch are improved. The process window for lithography increases by up to 40%, the aspect ratio for the etch and the contact fill is less, and the sensitivity to misalignment is reduced. The combination of rectangular contacts and C/sub 4/F/sub 8/-CH/sub 2/F/sub 2/ chemistry greatly enhances the product yield.
ISSN:0894-6507
1558-2345
DOI:10.1109/66.999596