Bias Dependence Model of Peak Frequency of GaN Trap in GaN HEMTs Using Low-Frequency Y₂₂ Parameters

• Published in: IEEE transactions on electron devices Vol. 68; no. 11; pp. 5565 - 5571
• Main Authors: Oishi, Toshiyuki, Otsuka, Tomohiro, Tabuchi, Masaya, Yamaguchi, Yutaro, Shinjo, Shintaro, Yamanaka, Koji
• Format: Journal Article
• Language: English
• Published: IEEE 01.11.2021
• Subjects: Frequency measurement; Gallium nitride; Gallium nitride-based high electron mobility transistor (GaN HEMT); GaN trap; HEMTs; Logic gates; Mathematical models; MODFETs; output admittance; Poole–Frenkel (PF); self-heating (SH); Temperature measurement
• ISSN: 0018-9383
• DOI: 10.1109/TED.2021.3115083

A model for the peak frequency in the imaginary part of <inline-formula> <tex-math notation="LaTeX">{Y}_{{22}} </tex-math></inline-formula> (Im(<inline-formula> <tex-math notation="LaTeX">{Y}_{{22}}{))} </tex-math></inline-formula> based on the bias for gallium nitride (GaN) high electron mobility transistors (HEMTs) is investigated while considering both self-heating (SH) and Poole-Frenkel (PF) (electric field) effects. The peak frequency of Im(<inline-formula> <tex-math notation="LaTeX">{Y}_{{22}}{)} </tex-math></inline-formula> corresponds to the emission time constant of the trap in the GaN layer. In this study, <inline-formula> <tex-math notation="LaTeX">{Y}_{{22}} </tex-math></inline-formula> for GaN HEMTs were measured for low frequencies at which the traps respond by significantly changing not only drain voltage (<inline-formula> <tex-math notation="LaTeX">{V}_{\text {DS}}{)} </tex-math></inline-formula> but also gate voltage (<inline-formula> <tex-math notation="LaTeX">{V}_{\text {GS}}{)} </tex-math></inline-formula>. Because the vector network analyzer used ac with an extremely small power of −20 dBm as a signal for sensing the trap, the trap properties can be measured at a fixed dc bias. In this model, the SH effect is introduced to replace the ambient temperature in the conventional Arrhenius equation by simulating the lattice temperature. The PF effect introduces the apparent activation energy, based on the simulated electric field at the channel under the gate field edge of the drain side. The electric field is related to the voltage between the gate and drain. This model is consistent with the experimental data for a wide range of transistor biases, i.e., from the <inline-formula> <tex-math notation="LaTeX">{V}_{\text {GS}} </tex-math></inline-formula> near the pinch-off voltage to the ON-state condition, and the <inline-formula> <tex-math notation="LaTeX">{V}_{\text {DS}} </tex-math></inline-formula> in the saturation region at ambient temperatures between 23 °C and 160 °C. Furthermore, using this model, we confirmed that the PF effect dominates at a low <inline-formula> <tex-math notation="LaTeX">{V}_{\text {GS}} </tex-math></inline-formula> of −2 V near the pinch-off.