A 1.1 GHz first 64 b generation 2900 microprocessor

The first 64 b S/390 microprocessor implemented in a 0.18 /spl mu/m, 7-level copper interconnect bulk CMOS process, runs operating system and applications at 1.1 GHz. The frequency is achieved with interconnect width and repeater optimization, selective use of low-Vt devices, tapered library gates,...

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Bibliographic Details
Published in2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) pp. 238 - 239
Main Authors Curran, B., Camporese, P., Carey, S., Yuen Chan, Yiu-Hing Chan, Clemen, R., Crea, R., Hoffman, D., Koprowski, T., Mayo, M., McPherson, T., Northrop, G., Sigal, L., Smith, H., Tanzi, F., Williams, P.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2001
Subjects
Circuit optimization
Circuit synthesis
CMOS process
Copper
Frequency synthesizers
Integrated circuit interconnections
Libraries
Microprocessors
Operating systems
Repeaters
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Summary:The first 64 b S/390 microprocessor implemented in a 0.18 /spl mu/m, 7-level copper interconnect bulk CMOS process, runs operating system and applications at 1.1 GHz. The frequency is achieved with interconnect width and repeater optimization, selective use of low-Vt devices, tapered library gates, and improved synthesis and circuit tuning algorithms.
ISBN:0780366085
9780780366084
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2001.912620