10μW/cm2-Class High Power Density Planar Si-Nanowire Thermoelectric Energy Harvester Compatible with CMOS-VLSI Technology

A best benchmark of Si-nanowire (NW) thermoelectric (TE) power generator has been achieved by our proposed planar device architecture compatible with CMOS process technology. The TE power density corresponds to 12 μW/cm 2 , which is recorded at an externally applied temperature difference of only 5...

Full description

Saved in:
Bibliographic Details
Published in2018 IEEE Symposium on VLSI Technology pp. 93 - 94
Main Authors Tomita, M., Oba, S., Himeda, Y., Yamato, R., Shima, K., Kumada, T., Xu, M., Takezawa, H., Mesaki, K., Tsuda, K., Hashimoto, S., Zhan, T., Zhang, H., Kamakura, Y., Suzuki, Y., Inokawa, H., Ikeda, H., Matsukawa, T., Matsuki, T., Watanabe, T.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2018
Subjects
Online AccessGet full text
ISSN2158-9682
DOI10.1109/VLSIT.2018.8510659

Cover

More Information
Summary:A best benchmark of Si-nanowire (NW) thermoelectric (TE) power generator has been achieved by our proposed planar device architecture compatible with CMOS process technology. The TE power density corresponds to 12 μW/cm 2 , which is recorded at an externally applied temperature difference of only 5 K. The demonstration opens up a pathway to cost effective autonomous internet of things (IoT) application utilizing environmental and body heats.
ISSN:2158-9682
DOI:10.1109/VLSIT.2018.8510659