A 0.25-/spl mu/m, 600-MHz, 1.5-V, fully depleted SOI CMOS 64-bit microprocessor

A 0.25-/spl mu/m, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon-on-insulator (SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 million transistors on a 209-mm/sup 2/ silicon die has been developed leveraging the existing bulk design. FD-SOI technology is used because it has be...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 34; no. 11; pp. 1436 - 1445
Main Authors Sung Bae Park, Young Wug Kim, Young Gun Ko, Kwang Il Kim, Il Kwon Kim, Hee-Sung Kang, Jin Oh Yu, Kwang Pyuk Suh
Format Journal Article
LanguageEnglish
Published IEEE 01.11.1999
Subjects
Capacitance-voltage characteristics
Circuit simulation
Circuit stability
Circuit testing
CMOS technology
Immune system
Leakage current
Microprocessors
Semiconductor films
Silicon on insulator technology
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Summary:A 0.25-/spl mu/m, four-layer-metal, 1.5-V, 600-MHz, fully depleted (FD) silicon-on-insulator (SOI) CMOS 64-bit ALPHA1 microprocessor integrating 9.66 million transistors on a 209-mm/sup 2/ silicon die has been developed leveraging the existing bulk design. FD-SOI technology is used because it has better immunity for dynamic leakage current than partially depleted SOI in high speed dynamic circuits without body contact. C-V characteristics of metal-oxide-silicon-oxide-silicon with and without source-drain junctions are described to explain the behavior of FD-SOI transistor. Race, speed, and dynamic stability have been simulated to reassure the circuit operation. Key process features are shallow trench isolation, 4-nm gate oxide, 30-nm co-silicide, 46-nm silicon film, and 200-nm buried oxide. The FD-SOI microprocessor runs 30% faster than that of bulk, and it passes the reliability and system test.
ISSN:0018-9200
1558-173X
DOI:10.1109/4.799847