A false alarm reduction method for PWB pattern inspection system

Among optical pattern inspection methods for PWBs (printed wiring boards), a feature-extraction method achieves higher throughput than a design-data-comparison method, but it cannot avoid false alarms completely. The authors propose an error-code-chain method to reduce these false alarms. A hierarch...

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Bibliographic Details
Published inProceedings. Japan IEMT Symposium, Sixth IEEE/CHMT International Electronic Manufacturing Technology Symposium pp. 346 - 349
Main Authors Serizawa, T., Takagi, K., Hamada, K., Odawara, G., Tamiya, Y., Wang, D.-S.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1989
Subjects
Abstracts
Data mining
Design methodology
Feature extraction
Hardware
Inspection
Pipelines
Precision engineering
Throughput
Wiring
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Summary:Among optical pattern inspection methods for PWBs (printed wiring boards), a feature-extraction method achieves higher throughput than a design-data-comparison method, but it cannot avoid false alarms completely. The authors propose an error-code-chain method to reduce these false alarms. A hierarchical defect analysis technique is employed, combining the feature-extraction method and the error-code-chain method. It discriminates between fatal defects and false alarms, taking global features into account. This method has been applied to the pattern inspection system described by G. Odawara et al. (1986), and it has achieved both false alarm reduction and video-rate processing.< >
DOI:10.1109/IEMTS.1989.76172