6.4 Single-shot 200Mfps 5×3-aperture compressive CMOS imager

• Published in: 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers pp. 1 - 3
• Main Authors: Mochizuki, Futa, Kagawa, Keiichiro, Okihara, Shin-ichiro, Min-Woong Seo, Bo Zhang, Takasawa, Taishi, Yasutomi, Keita, Kawahito, Shoji
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2015
• Subjects: Apertures; CMOS integrated circuits; Image coding; Laser beams; Measurement by laser beam; Plasmas; Synchronization
• ISBN: 9781479962235; 1479962236
• ISSN: 0193-6530; 2376-8606
• DOI: 10.1109/ISSCC.2015.7062953

Ultra-high-speed cameras are a powerful tool for biology as well as physics and mechanics to analyze the process of ultra-high-speed phenomena. The frame rate of the state-of-the-art burst-readout ultra-high-speed silicon imagers has reached approximately 20Mfps [1,2]. To observe faster phenomena such as plasma generation in laser processing, the state of electrons in a chemical reaction, and so on, much faster cameras are desired. There are several factors that prevent the speed-up of the ultra-high-speed imager: high gate control voltages and high power dissipation for high-efficiency multi-stage charge transfer in CCD imagers, and the current density limit of the power and ground lines and RC-constant of the vertical readout lines in CMOS imagers. Computational imaging can be a promising option to break the design limit of solid-state ultra-high-speed imagers. Several dedicated CMOS imagers have been demonstrated [3,4]. This paper presents a demonstration of a single-chip ultra-high-speed multi-aperture CMOS imager based on compressive sampling. The imager performs single-shot burst-readout image acquisition at a frame rate of 200Mfps.