A comparison of monolithic background calibration in two time-interleaved analog-to-digital converters
Two background calibration methods for time-interleaved pipelined analog-to-digital converters are described and compared. One approach uses an extra ADC channel and analog calibration circuits; the other uses extra resolution and digital calibration circuits. Both approaches have been integrated in...
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Published in | 1998 IEEE International Symposium on Circuits and Systems (ISCAS) Vol. 1; pp. 13 - 16 vol.1 |
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Main Authors | , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1998
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Subjects | |
Online Access | Get full text |
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Summary: | Two background calibration methods for time-interleaved pipelined analog-to-digital converters are described and compared. One approach uses an extra ADC channel and analog calibration circuits; the other uses extra resolution and digital calibration circuits. Both approaches have been integrated in a 1-/spl mu/m CMOS process. The strengths and weaknesses of the two approaches are presented, and the measured data are compared. |
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ISBN: | 9780780344556 0780344553 |
DOI: | 10.1109/ISCAS.1998.704123 |