Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems

• Published in: 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE) pp. 1 - 4
• Main Authors: Cilardo, Alessandro, Fusella, Edoardo, Gallo, Luca, Mazzeo, Antonino
• Format: Conference Proceeding
• Language: English
• Published: EDAA 01.03.2014
• Subjects: Bridges; Computer architecture; Hardware; Integrated circuit interconnections; Schedules; System-on-chip; Topology

This work proposes an automated methodology for optimizing FPGA-based many-core interconnect architectures. Based on the application communication requirements, the methodology concurrently defines the structure of the interconnect and the communication task scheduling, taking into account possible...