13.5 A 16nm 128Mb SRAM in high-κ metal-gate FinFET technology with write-assist circuitry for low-VMIN applications

• Published in: 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) pp. 238 - 239
• Main Authors: Yen-Huei Chen, Wei-Min Chan, Wei-Cheng Wu, Hung-Jen Liao, Kuo-Hua Pan, Jhon-Jhy Liaw, Tang-Hsuan Chung, Quincy Li, Chang, George H., Chih-Yung Lin, Mu-Chi Chiang, Shien-Yang Wu, Natarajan, Sreedhar, Chang, Jonathan
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2014
• Subjects: CMOS integrated circuits; Couplings; FinFETs; High K dielectric materials; Logic gates; Random access memory

FinFET technology has become a mainstream technology solution for post-20nm CMOS technology [1], since it has superior short-channel effects, better sub-threshold slope and reduced random dopant fluctuation. Therefore, it is expected to achieve better performance with lower SRAM V DDMIN . However, t...