8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS

• Published in: 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) pp. 142 - 143
• Main Authors: Mammei, Enrico, Loi, Fabrizio, Radice, Francesco, Dati, Angelo, Bruccoleri, Melchiorre, Bassi, Matteo, Mazzanti, Andrea
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.02.2014
• Subjects: CMOS integrated circuits; Delay lines; Equalizers; Finite impulse response filters; Optical fiber dispersion; Optical fiber LAN; Solid state circuits
• ISBN: 1479909181; 9781479909186
• ISSN: 0193-6530; 2376-8606
• DOI: 10.1109/ISSCC.2014.6757373

Multi-mode fiber (MMF) is the most cost-effective fiber for high-speed LANs. Modal dispersion leads to optical-energy spreading over several symbol periods, drastically limiting distance and data-rate. Compared with copper channels, equalization is challenging because the channel response varies enormously from fiber to fiber and also over time [1]. These aspects, paired with the practical difficulty of implementing TX pulse shaping, increase the equalization burden at the receiver. To date, electronic dispersion compensation (EDC) consisting of an FIR filter cascaded with a nonlinear equalizer, such as DFE, enables 10Gb/s up to 300m according to the 10GBASE-LRM standard. To satisfy the demand for greater network capacity, solutions to reach 25Gb/s on a single fiber, and up to 400Gb/s aggregated throughput with space-division multiplexing on 16 fibers are being investigated [2]. At this data-rate, robust DSP-based EDCs still need high power, indicating an analog approach to signal processing to reduce power. To have market impact and economic feasibility, the interface must be flexible, accommodating a variable data-rates for compatibility with legacy channels and different standards [2]. In addition, achieving high energy efficiency at each standard (i.e., data rate) is fundamental.