TGLD: a 16 channel charge readout chip for the PHENIX Pad Chamber detector subsystem at RHIC

This paper describes the PHENIX Pad Chamber (PC) subsystem charge readout chip, TGLD. Due to the PC's high channel density, the TGLD and associated circuitry operate within the active detector region as permanent, zero access components during PHENIX operation and implement remote set-up, test...

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Bibliographic Details
Published in1997 IEEE Nuclear Science Symposium Conference Record Vol. 1; pp. 236 - 239 vol.1
Main Authors Bryan, W.L., Jagadish, U., Britton, C.L., Frank, S.S., Ericson, M.N., Simpson, M.L., Young, G.R., Clonts, L.G., Smith, R.S., Oskarsson, A., Mark, T., Obrien, E., Greene, V.
Format Conference Proceeding
LanguageEnglish
Published IEEE 1997
Subjects
Atherosclerosis
Capacitance
Circuit testing
Detectors
Laboratories
Particle tracking
Readout electronics
Robust control
Switches
System testing
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Summary:This paper describes the PHENIX Pad Chamber (PC) subsystem charge readout chip, TGLD. Due to the PC's high channel density, the TGLD and associated circuitry operate within the active detector region as permanent, zero access components during PHENIX operation and implement remote set-up, test and operation. Since the PC detector consists of three subassemblies (PC1, PC2 and PC3) that detect particles at three different distances from the PHENIX collision vertex, the TGLD design accommodates varying pad capacitance and charge gain for PC1, PC2 and PC3 and provides adjustable discrimination thresholds from MIP/10 to 2 MIP (minimum ionizing particle). Operation with a complimentary digital memory unit (DMU) to form low power, low mass, readout cards is described. Partitioning of readout electronics and address control for robust PC operation are discussed. Component and system test results are reported.
ISBN:0780342585
9780780342583
ISSN:1082-3654
2577-0829
DOI:10.1109/NSSMIC.1997.672576