A 1.2-V 0.09-µm high-gain buffered amplifier for 14.2-GHz satellite applications

• Published in: 2012 7th International Conference on Electrical and Computer Engineering pp. 426 - 429
• Main Author: Roy, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2012
• Subjects: Buffered Amplifier; CMOS integrated circuits; Gain; Inductors; K u band; Logic gates; Noise; Noise measurement; Transistors
• ISBN: 9781467314343; 146731434X
• DOI: 10.1109/ICECE.2012.6471578

Employing a 90-nm CMOS process, this article presents a high-gain, low-power (9.2 mW), highly-linearized (IIP3: 8.5 dBm), buffered amplifier for satellite applications near the lower edge of K u -band (14.2 GHz). Over the frequencyband of interest (13.2-15.4 GHz), the amplifier achieves low noise contribution (<;3.41 dB) and excellent port-matching (<;-10 dB) simultaneously. With an effective 3-dB bandwidth of 2.2 GHz, the circuit demonstrates a small-signal forward gain of 24 dB and a noise figure (NF) of 3.25 dB at 14.2 GHz while maintaining a minimum input return-loss of -35 dB. Effect of impedance mismatch and process parasites are included in the design to facilitate a layout-sensitive RF analysis. When compared with simulated results of published amplifiers, the proposed design fares better in terms of linearity, forward gain and watt-per-decibel requirements.