Scalable hybrid verification for embedded software

The verification of embedded software has become an important subject over the last years. However, neither standalone verification approaches, like simulation-based or formal verification, nor state-of-the-art hybrid/semiformal verification approaches are able to verify large and complex embedded s...

Full description

Saved in:
Bibliographic Details
Published in2011 Design, Automation & Test in Europe pp. 1 - 6
Main Authors Behrend, Jörg, Lettnin, D, Heckeler, P, Ruf, J, Kropf, T, Rosenstiel, W
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.03.2011
Subjects
Computational modeling
Embedded software
EPROM
Hardware
Input variables
Monitoring
Online AccessGet full text

Cover

More Information
Summary:The verification of embedded software has become an important subject over the last years. However, neither standalone verification approaches, like simulation-based or formal verification, nor state-of-the-art hybrid/semiformal verification approaches are able to verify large and complex embedded software with hardware dependencies. This work presents a new scalable and extendable hybrid verification approach for the verification of temporal properties in embedded software with hardware dependencies using for the first time a new mixed bottom-up/top-down algorithm. Therefore, new algorithms and methodologies like static parameter assignment and counterexample guided simulation are proposed in order to combine simulation-based and formal verification in a new way. We have successfully applied this hybrid approach to embedded software applications: Motorola's Powerstone Benchmark suite and a complex industrial embedded automotive software. The results show that our approach scales better than stand-alone software model checkers to reach deep state spaces. The whole approach is best suited for fast falsification.
ISBN:9781612842080
1612842089
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2011.5763039