TOPOLOGIZER: An Expert System Translator of Transistor Connectivity to Symbolic Cell Layout

TOPOLOGIZER is an expert system for the design of CMOS cells. It automatically generates a symbolic layout given a transistor connection list and a description of the boundary assignment of external cell connections. As part of an overall approach to silicon compilation it uses expert designer speci...

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Bibliographic Details
Published inESSCIRC '84: Tenth European Solid-State Circuits Conference pp. 175 - 178
Main Authors Kollaritsch, P. W., Weste, N. H. E.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.1984
Subjects
Assembly systems
Counting circuits
Design methodology
Expert systems
Integrated circuit layout
Libraries
Productivity
Programmable logic arrays
Read only memory
Silicon
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Summary:TOPOLOGIZER is an expert system for the design of CMOS cells. It automatically generates a symbolic layout given a transistor connection list and a description of the boundary assignment of external cell connections. As part of an overall approach to silicon compilation it uses expert designer specified heuristics to perform the difficult task of converting a structural description (schematic) into a physical description that maintains some notion of structured layout principles.