Design of SCD Checkers based on Analytical Fault Hypotheses

This paper deals with the design of the largest class of checkers - the Strongly Code Disjoint (SCD) checkers - that may be devised such that a combinational system composed of a functional part and a SCD checker achieves the TSC goal. The definition and properties of SCD checker are given. The desi...

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Bibliographic Details
Published inESSCIRC '84: Tenth European Solid-State Circuits Conference pp. 109 - 112
Main Authors Jansch, I., Courtois, B.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.1984
Subjects
Circuit faults
Circuit synthesis
Circuit topology
Integrated circuit interconnections
Integrated circuit modeling
Libraries
Logic circuits
Redundancy
Space technology
Test pattern generators
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Summary:This paper deals with the design of the largest class of checkers - the Strongly Code Disjoint (SCD) checkers - that may be devised such that a combinational system composed of a functional part and a SCD checker achieves the TSC goal. The definition and properties of SCD checker are given. The design of a SCD checker cell is analysed, based on low-level fault hypotheses. Some comments about cells interconnection introduce the idea of a checker cell library.