Design, implementation and applications of low-complexity LDPC codes

Structured LDPC codes enable low-complexity decoding as well as efficient implementation of encoder reducing the complexity downto the order of the number of parity-check bits. Construction of structured LDPC codes is based on combinatorial approaches such as Balanced-Incomplete Block-Design (BIBD)...

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Bibliographic Details
Published in2008 2nd International Conference on Signal Processing and Communication Systems p. 1
Main Authors Honary, B., Heravi, B. M., Kariyawasam, S., Pandya, N.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2008
Subjects
Base stations
Communication system security
Cryptography
Decoding
Digital video broadcasting
Galois fields
Jamming
Parity check codes
Power system security
Wireless sensor networks
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Summary:Structured LDPC codes enable low-complexity decoding as well as efficient implementation of encoder reducing the complexity downto the order of the number of parity-check bits. Construction of structured LDPC codes is based on combinatorial approaches such as Balanced-Incomplete Block-Design (BIBD) and Finite Fields to design quasi-cyclic LDPC (QC-LDPC) codes. Well designed QC-LDPC codes can perform as well as randomly constructed LDPC codes with iterative decoding based on belief propagation in terms of bit-error probability. It has been shown that QC-LDPC codes can achieve lower error floor than randomly constructed LDPC codes. Within this work, the design of Quasi-cyclic LDPC codes for a range of practical applications is discussed which includes construction of variable-rate large-block-length LDPC codes for DVB-S2 and DVB-T2 applications and adaptive short-block-length LDPC codes for HF applications. Moreover, efficient implementation of QC-LDPC decoder/encoder for FPGA devices which reduces memory requirements is presented.
DOI:10.1109/ICSPCS.2008.4813651