A 40-Gb/s Transimpedance Amplifier in 0.18- \mum CMOS Technology

A 40-Gb/s transimpedance amplifier (TIA) is realized in 0.18-mum CMOS technology. From the measured S-parameters, a transimpedance gain of 51 dBOmega and a 3-dB bandwidth up to 30.5 GHz were observed. A bandwidth enhancement technique, pi-type inductor peaking (PIP), is proposed to achieve a bandwid...

Full description

Saved in:
Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 43; no. 6; pp. 1449 - 1457
Main Authors Jun-De Jin, Hsu, S.S.H.
Format Journal Article
LanguageEnglish
Published IEEE 01.06.2008
Subjects
Bandwidth
Bandwidth enhancement technique
Broadband amplifiers
Capacitance
CMOS
CMOS technology
Equivalent circuits
Frequency
gain-bandwidth product
Inductors
Optical amplifiers
pi -type inductor peaking
Semiconductor device noise
transimpedance amplifier (TIA)
Wideband
Online AccessGet full text

Cover

More Information
Summary:A 40-Gb/s transimpedance amplifier (TIA) is realized in 0.18-mum CMOS technology. From the measured S-parameters, a transimpedance gain of 51 dBOmega and a 3-dB bandwidth up to 30.5 GHz were observed. A bandwidth enhancement technique, pi-type inductor peaking (PIP), is proposed to achieve a bandwidth enhancement ratio (BWER) of 3.31. In addition, the PIP topology used at the input stage decreases the noise current as the operation frequency increases. Under a 1.8 V supply voltage, the TIA consumes 60.1 mW with a chip area of 1.17 X 0.46 mm2. The proposed CMOS TIA presents a gain-bandwidth product per DC power figure of merit (GBP/P de ) of 180.1 GHzOmega/mW.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2008.922735