Power-Up Triggering Conditions for Latch-Up in Bulk CMOS

Current flow from a transient stimulus can activate the parasitic bipolar devices inherent in bulk CMOS integrated circuits. Whether or not latch-up results depends both on the dynamics of the stimulus and on the parameter values for the parasitic PNPN structure: Our analysis shows that under certai...

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Bibliographic Details
Published in1982 Symposium on VLSI Technology. Digest of Technical Papers pp. 52 - 53
Main Authors Troutman, R. R., Zappe, H. P.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.1982
Subjects
Analytical models
Capacitance
CMOS integrated circuits
CMOS technology
Integrated circuit technology
Knee
Piecewise linear approximation
Resistors
Transient analysis
Voltage
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Summary:Current flow from a transient stimulus can activate the parasitic bipolar devices inherent in bulk CMOS integrated circuits. Whether or not latch-up results depends both on the dynamics of the stimulus and on the parameter values for the parasitic PNPN structure: Our analysis shows that under certain conditions, dynamic recovery is possible when the sum of the transistor alphas exceeds unity.