Investigation of Substrate Noise Coupling and Isolation Characteristics for a 0.35μM HV CMOS Technology

• Published in: Proceedings of the 14th International Conference, Mixed Design of Integrated Circuits and Systems : MIXDES 2007 : Ciechocinek, Poland, 21-23 June, 2007 pp. 429 - 432
• Main Authors: Pflanzl, W.C., Seebacher, E.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.06.2007
• Subjects: CMOS technology; Crosstalk; Damping; Electrical resistance measurement; Fixtures; guard ring; HV CMOS; Isolation; Isolation technology; Radio frequency; Resistors; Semiconductor device modeling; Substrate coupling; Testing
• ISBN: 9788392263241; 8392263243
• DOI: 10.1109/MIXDES.2007.4286198

This paper presents the characterization of substrate noise coupling and the isolation capability of ohmic substrate contacts in a HV CMOS technology. Layout variations of contact sizes, distances, and several p+ guard structures are subject of this research. Metal shielded DUT fixtures have been developed to improve the reliability and accuracy of the measurements. All test cases are fabricated with a 0.35μm HV CMOS technology (Vmax <= 120 V). This process features high resistive native substrate (20 Ohm.cm) together with a 0.5 Ohm.cm pwell. The modeling section describes the distributed substrate "resistor" and the DUT fixture behavior.