Optimized Design of a Digital IQ Demodulator Suitable for Adaptive Predistortion of 3rd Generation Base Station PAs

This paper presents an optimized design of a high-speed digital IQ demodulator intended for the implementation of the feedback path of an adaptive base band pre-distorter (DPD). Indeed, the optimization of the DPD linearization capability in terms of correction bandwidth and nonlinearity effects min...

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Bibliographic Details
Published in2006 13th IEEE International Conference on Electronics, Circuits and Systems pp. 573 - 576
Main Authors Rebai, C., Ayari, H., Ghazel, A., Boumaiza, S., Ghannouchi, F.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2006
Subjects
Base stations
Demodulation
Design engineering
Design optimization
Digital signal processing
Feedback
Field programmable gate arrays
Predistortion
Radio frequency
Signal synthesis
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Summary:This paper presents an optimized design of a high-speed digital IQ demodulator intended for the implementation of the feedback path of an adaptive base band pre-distorter (DPD). Indeed, the optimization of the DPD linearization capability in terms of correction bandwidth and nonlinearity effects minimization is directly related to the accuracy and speed of the IQ demodulator. In this work, a digital IQ demodulator is designed, optimized and implemented in a Xilinx FPGA device. This allowed a high speed processing of about 200MHZ with a substantial reduction of the FPGA used gates.
ISBN:9781424403943
1424403944
DOI:10.1109/ICECS.2006.379853