A bit-serial approach to VLSI implementation of digital LDI ladder filters
LDI (lossless discrete integrator, or leapfrog) digital ladder filters are shown to exhibit the most favorable properties for VLSI integration among low-sensitivity recursive filter structures. Using an exact synthesis procedure derived from the switched-capacitor-filter silicon compiler IMAN, novel...
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Published in | International Conference on Acoustics, Speech, and Signal Processing pp. 2552 - 2555 vol.4 |
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Main Authors | , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
1989
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Subjects | |
Online Access | Get full text |
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Summary: | LDI (lossless discrete integrator, or leapfrog) digital ladder filters are shown to exhibit the most favorable properties for VLSI integration among low-sensitivity recursive filter structures. Using an exact synthesis procedure derived from the switched-capacitor-filter silicon compiler IMAN, novel structures realizing purely LDI-transformed all-pole and pole-zero transfer functions are generated. Dedicated systolic bit-serial architectures for these structures are investigated. A prototype chip for an eighth-order all-pole low-pass filter, fabricated in 1.2- mu m CMOS technology, is presented.< > |
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ISSN: | 1520-6149 2379-190X |
DOI: | 10.1109/ICASSP.1989.266988 |