A fast digital fuzzy logic controller: FPGA design and implementation

This paper describes an improved approach to design a Takagi-Sugeno zero-order type fast parameterized digital fuzzy logic controller (DFLC) processing only the active rules (rules that give a non-null contribution for a given input data set), at high frequency of operation, without significant incr...

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Bibliographic Details
Published in2005 IEEE Conference on Emerging Technologies and Factory Automation Vol. 1; pp. 4 pp. - 262
Main Authors Deliparaschos, K.M., Nenedakis, F.I., Tzafestas, S.G.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Data processing
Design methodology
Digital control
Field programmable gate arrays
Frequency
Fuzzy control
Fuzzy logic
Hardware
Process control
Takagi-Sugeno model
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Summary:This paper describes an improved approach to design a Takagi-Sugeno zero-order type fast parameterized digital fuzzy logic controller (DFLC) processing only the active rules (rules that give a non-null contribution for a given input data set), at high frequency of operation, without significant increase in hardware complexity. To achieve this goal, an improved method of designing the fuzzy controller model is proposed that significantly reduces the time required to process the active rules and effectively increases the input data processing rate. The DFLC discussed in this paper achieves an internal core processing speed of at least 200 MHz, featuring two 8-bit inputs and one 12-bit output, with up to seven trapezoidal shape membership functions per input and a rule base of up to 49 rules. The proposed architecture was implemented in a field programmable gate array (FPGA) chip with the use of a very high-speed integrated-circuits hardware-description-language (VHDL) and advanced synthesis and place and route tools
ISBN:9780780394018
0780394011
ISSN:1946-0740
1946-0759
DOI:10.1109/ETFA.2005.1612530