Novel transition layer engineered Si nanocrystal flash memory with MHSOS structure featuring large V/sub th/ window and fast P/E speed

In this work, we propose a MHSOS (metal gate/high-k/SRO(silicon-rich oxide)/SiO 2 /Si) structure showing large memory window (> 4V) with fast P/E speed (plusmn18 V, 200 mus). The erase speed is featuring faster than that of Si 3 N 4 and has a retention time of 10 years for 10 % charge loss. These...

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Published inIEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest pp. 4 pp. - 868
Main Authors Kyong-Hee Joo, Xiofeng Wang, Jeong Hee Han, Seung-Hyun Lim, Seung-Jae Baik, Yong-Won Cha, Jin Wook Lee, In-Seok Yeo, Young-Kwan Cha, In Kyeong Yoo, U-In Chung, Joo Tae Moon, Byung-Il Ryu
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Annealing
Dielectric materials
Flash memory
Microstructure
Moon
MOSFETs
Nanocrystals
Nonvolatile memory
Silicon
Tunneling
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Summary:In this work, we propose a MHSOS (metal gate/high-k/SRO(silicon-rich oxide)/SiO 2 /Si) structure showing large memory window (> 4V) with fast P/E speed (plusmn18 V, 200 mus). The erase speed is featuring faster than that of Si 3 N 4 and has a retention time of 10 years for 10 % charge loss. These excellent properties were obtained through the modification of the transition layer between Si-NC and SiO 2 matrix in an SRO medium, as well as tunneling/blocking dielectric material optimization
ISBN:9780780392687
078039268X
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2005.1609494