4-bit per cell NROM reliability

The realization of a 4-bit NROM cell is possible due to the two physically separated bits on each side of the cell. Only 4 Vt levels on each bit are required. Key features of a 4-bit product are optimized technology, accurate and fast programming algorithm (3MB/s write speed), no single bit failures...

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Bibliographic Details
Published inIEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest pp. 539 - 542
Main Authors Eitan, B., Cohen, G., Shappir, A., Eli Lusky, Givant, A., Janai, M., Bloom, I., Polansky, Y., Dadashev, O., Lavan, A., Sahar, R., Maayan, E.
Format Conference Proceeding
LanguageEnglish
Published IEEE 2005
Subjects
Costs
Dielectrics
Error correction
Hot carriers
Nonvolatile memory
Radio access networks
Threshold voltage
Tunneling
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Summary:The realization of a 4-bit NROM cell is possible due to the two physically separated bits on each side of the cell. Only 4 Vt levels on each bit are required. Key features of a 4-bit product are optimized technology, accurate and fast programming algorithm (3MB/s write speed), no single bit failures and window sensing with moving reference as an error detection and correction scheme
ISBN:9780780392687
078039268X
ISSN:0163-1918
2156-017X
DOI:10.1109/IEDM.2005.1609402